Difference between revisions of "I2S"

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==Overview==
 
==Overview==
The "I2S" interface format is "I squared S" and is also known as "Inter-IC Sound" or "Integrated Interchip Sound." In some cases; limitations in the text formatting can require it to appear as "I2S." The primary application of this interface is to connect digital audio IC's located on the same printed circuit board.
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The I²S interface format, pronounced as "I squared S" stands for "Inter-IC Sound" or alternatively, "Integrated Interchip Sound." Frequently, because of limitations in the text formatting it may appear written as "I2S." The primary application of this interface is to connect digital audio IC's located on the same printed circuit board.
 +
 
 
==Basics==
 
==Basics==
Once the digital information is generated by the AD converter; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect teh AD converter IC to a digital audio interface IC; and typically consists of three signals:
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Once the digital information is generated by the [[AD converter]]; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a [[digital audio]] interface IC; and typically consists of three signals:
I.) The "Bit Clock" which has one cycle for each "bit" in the [[serial data]] output of the AD converter.
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II.) The "Word Clock" which is at the sample frequency and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units).
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# The [[Bit Clock]] which has one cycle for each "bit" in the serial data output of the AD converter.
III.) The "Serial Data" which is the digital code containing each sample's voltage level information.
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# The [[Word Clock]] which is at the sample frequency, and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units). Sometimes referred to as "Left-Right Clock."
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# The [[Serial Data]] which is the digital code containing each sample's voltage level information. The information alternates between left and right channel data.
  
This format is not intended for (external) transmission between digital audio devices and is subject to the same jitter and noise considerations as any other high frequency interface.
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This format is not intended for (external) transmission between digital audio devices and is subject to the same [[jitter]] and noise considerations as any other high frequency interface. Please see [[bit clock]] and [[AES]] for more details. Digital audio formats designed explicitly for transmission between pieces of equipment have an "embedded" bit clock as part of the electrical waveform, and the coding of the electrical waveform allows for these very high frequency signals to be transmitted with signal transformers; which allows them to work properly. Formats like I2s do not have the means to address serious issues that arise when transmitting very high frequency signals more than short distance because it requires DC transmission. The discussion of these issues is beyond the scope of this subject.
  
 
[[Category:Terminology]]
 
[[Category:Terminology]]

Latest revision as of 12:25, 19 May 2017

Overview

The I²S interface format, pronounced as "I squared S" stands for "Inter-IC Sound" or alternatively, "Integrated Interchip Sound." Frequently, because of limitations in the text formatting it may appear written as "I2S." The primary application of this interface is to connect digital audio IC's located on the same printed circuit board.

Basics

Once the digital information is generated by the AD converter; it must be transmitted to the next device for storage or processing. Internal to the AD converter system; the I2S format is commonly used to connect the AD converter IC to a digital audio interface IC; and typically consists of three signals:

  1. The Bit Clock which has one cycle for each "bit" in the serial data output of the AD converter.
  2. The Word Clock which is at the sample frequency, and each half cycle is used to define whether the serial data is the left channel or right channel data (most contemporary converters are "stereo" two channel units). Sometimes referred to as "Left-Right Clock."
  3. The Serial Data which is the digital code containing each sample's voltage level information. The information alternates between left and right channel data.

This format is not intended for (external) transmission between digital audio devices and is subject to the same jitter and noise considerations as any other high frequency interface. Please see bit clock and AES for more details. Digital audio formats designed explicitly for transmission between pieces of equipment have an "embedded" bit clock as part of the electrical waveform, and the coding of the electrical waveform allows for these very high frequency signals to be transmitted with signal transformers; which allows them to work properly. Formats like I2s do not have the means to address serious issues that arise when transmitting very high frequency signals more than short distance because it requires DC transmission. The discussion of these issues is beyond the scope of this subject.